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1 in the absence of confirmation by device specification sheets, sharp takes no responsibility for any defects that may occur in equipment using any sharp devices shown in catalogs, data books, etc. contact sharp in order to obtain the latest device specification sheets before using any sharp device. description the LZ2523 is a 1/5-type (3.6 mm) solid-state image sensor that consists of pn photo-diodes and ccds (charge-coupled devices). with approximately 320 000 pixels (542 horizontal x 582 vertical), the sensor provides a stable high-resolution color image. features number of effective pixels : 512 (h) x 582 (v) number of optical black pixels e horizontal : 2 front and 28 rear pixel pitch : 5.8 m (h) x 3.8 m (v) mg, g, cy, and ye complementary color filters low fixed-pattern noise and lag no burn-in and no image distortion blooming suppression structure built-in output amplifier built-in overflow drain voltage circuit and reset gate voltage circuit horizontal shift register clock voltage : 3.6 v (typ.) variable electronic shutter (1/50 to 1/10 000 s) compatible with pal standard package : 14-pin half-pitch wdip [plastic] (wdip014-p-0400a) row space : 10.16 mm pin connections precautions the exit pupil position of lens should be more than 25 mm from the top surface of the ccd. refer to "precautions for ccd area sensors" for details. LZ2523 1/5-type color ccd area sensor with 320 k pixels LZ2523 1od 2 rs 3nc 1 4os 5nc 2 6 h2 7 h1 14 13 12 11 10 9 8 gnd v4 v3 v2 v1 pw ofd 14-pin half-pitch wdip top view (wdip014-p-0400a)
LZ2523 2 pin description absolute maximum ratings (t a = +25 ?c) symbol pin name od output transistor drain os output signals rs reset transistor clock v1 , v2 , v3 , v4 vertical shift register clock h1 , h2 horizontal shift register clock pw p-well gnd ground nc 1 , nc 2 no connection parameter symbol rating unit output transistor drain voltage v od 0 to +18 v reset gate clock voltage v rs internal output v vertical shift register clock voltage v v e11.5 to +17.5 v horizontal shift register clock voltage v h e0.3 to +12 v voltage difference between p-well and vertical clock v pw -v v e29 to 0 v storage temperature t stg e40 to +85 ?c ambient operating temperature t opr e20 to +70 ?c 2 note notes : 1. do not connect to dc voltage directly. when ofd is connected to gnd, connect v od to gnd. overflow drain clock is applied below 27 vp-p. 2. do not connect to dc voltage directly. when rs is connected to gnd, connect v od to gnd. reset gate clock is applied below 8 vp-p. 3. when clock width is below 10 s, and clock duty factor is below 0.1%, voltage difference between vertical clocks will be below 28 v. overflow drain ofd 1 v internal output v ofd overflow drain voltage 3 v 0 to +15 v v -v v voltage difference between vertical clocks
3 LZ2523 recommended operating conditions parameter symbol min. typ. max. unit note ambient operating temperature t opr 25.0 ?c output transistor drain voltage v od 14.55 15.0 15.45 v notes : connect nc 1 and nc 2 to gnd directly or through a capacitor larger than 0.047 f. 1. use the circuit parameter indicated in "system configuration example" , and do not connect to dc voltage directly. 2. v pw is set below v vl that is low level of vertical shift register clock, or is used with the same power supply that is connected to v l of v driver ic. * to apply power, first connect gnd and then turn on v od . after turning on v od , turn on pw first and then turn on other powers and pulses. do not connect the device to or disconnect it from the plug socket while power is being applied. 1 v 24.5 22.5 v ofd overflow drain clock p-well voltage v pw e10.0 v vl v2 ground gnd 0.0 v v e8.5 e9.0 e9.5 v v1l , v v2l v v3l , v v4l vertical shift register clock low level intermediate level high level v v1i , v v2i v v3i , v v4i v v1h , v v3h 14.55 0.0 15.0 15.45 v v low level horizontal shift register clock v h1l , v h2l e0.05 0.0 0.05 v high level v h1h , v h2h 3.3 3.6 5.5 v 1 v 5.5 5.0 4.5 v rs reset gate clock p-p level reset gate clock frequency f rs 9.66 mhz horizontal shift register clock frequency f h1 , f h2 9.66 mhz vertical shift register clock frequency f v1 , f v2 f v3 , f v4 15.63 khz p-p level
LZ2523 4 characteristics (drive method : field accumulation) (t a = +25 ?c, operating conditions : the typical values specified in " recommended operating conditions ". color temperature of light source : 3 200 k, ir cut-off filter (cm-500, 1 mmt) is used.) parameter symbol min. typ. max. unit note standard output voltage v o 150 mv 2 photo response non-uniformity prnu 15 % 3 saturation output voltage v sat 500 650 mv 4 dark output voltage v dark 0.5 3.0 mv 1, 5 dark signal non-uniformity dsnu 0.5 2.0 mv 1, 6 sensitivity r 145 200 mv 7 smear ratio smr e80 e70 db 8 image lag ai 1.0 % 9 blooming suppression ratio abl 1 000 10 output transistor drain current i od 4.0 8.0 ma output impedance r o 350 $ vector breakup 7.0 ?, % 11 line crawling 3.0 % 12 luminance flicker 2.0 % 13 notes : within the recommended operating conditions of v od , v ofd of the internal output satisfies with abl larger than 1 000 times exposure of the standard exposure conditions, and v sat larger than 500 mv. 1. t a = +60 ?c 2. the average output voltage under uniform illumination. the standard exposure conditions are defined as when vo is 150 mv. 3. the image area is divided into 10 x 10 segments under the standard exposure conditions. each segment's voltage is the average output voltage of all pixels within the segment. prnu is defined by (vmax e vmin)/vo, where vmax and vmin are the maximum and minimum values of each segment's voltage respectively. 4. the image area is divided into 10 x 10 segments. each segment's voltage is the average output voltage of all pixels within the segment. v sat is the minimum segment's voltage under 10 times exposure of the standard exposure conditions. 5. the average output voltage under non-exposure conditions. 6. the image area is divided into 10 x 10 segments under non-exposure conditions. dsnu is defined by (vdmax e vdmin), where vdmax and vdmin are the maximum and minimum values of each segment's voltage respectively. 7. the average output voltage when a 1 000 lux light source with a 90% reflector is imaged by a lens of f4, f50 mm. 8. the sensor is exposed only in the central area of v/10 square with a lens at f4, where v is the vertical image size. smr is defined by the ratio of the output voltage detected during the vertical blanking period to the maximum output voltage in the v/10 square. 9. the sensor is exposed at the exposure level corresponding to the standard conditions. ai is defined by the ratio of the output voltage measured at the 1st field during the non-exposure period to the standard output voltage. 10. the sensor is exposed only in the central area of v/10 square, where v is the vertical image size. abl is defined by the ratio of the exposure at the standard conditions to the exposure at a point where blooming is observed. 11. observed with a vector scope when the color bar chart is imaged under the standard exposure conditions. 12. the difference between the average output voltage of the (mg + ye), (g + cy) line and that of the (mg + cy), (g + ye) line under the standard exposure conditions. 13. the difference between the average output voltage of the odd field and that of the even field under the standard exposure conditions.
LZ2523 5 pixel structure yy yy yy yy yy yy yyy y y y y y y y y y y y y yyy 512 (h) x 582 (v) 1 pin optical black (2 pixels) optical black (28 pixels) color filter array gmggmgg cy ye cy ye cy mggmggmg cy ye cy ye cy gmggmgg cy ye cy ye cy mg g mg g mg ye cy ye cy ye g mg g mg g ye cy ye cy ye mg g mg g mg ye cy ye cy ye mg g mg g mg ye cy ye cy ye g mg g mg g ye cy ye cy ye mg g mg g mg ye cy ye cy ye gmggmgg cy ye cy ye cy mggmggmg cy ye cy ye cy gmggmgg cy ye cy ye cy (1, 582) (512, 582) (1, 1) (512, 1) 2nd, 4th field 1st, 3rd field
LZ2523 6 timing chart 580 + 581 582 1 + 2 3 + 4 5 + 6 7 + 8 os ofd v4 v3 v2 v1 vd hd (1st, 3rd field) shutter speed 1/2 000 s vertical transfer timing 579 + 580 581 + 582 1 2 + 3 4 + 5 6 + 7 os ofd v4 v3 v2 v1 vd hd (2nd, 4th field) 623 311 318 332 625 1 6 22 20 os rs h2 h1 hd ... 512 ob (28) ob (2) ofd v4 v3 v2 v1 horizontal transfer timing 618, 1 60 29 49 39 54 24 34 64 62 72 59 output (512) 1 11
LZ2523 7 v4 v3 v2 v1 hd v4 v3 v2 v1 hd (1st, 3rd field) (2nd, 4th field) readout timing 1 29 39 24 34 64 54 59 161 180 290 338 242 290 449 618, 1 60 29 39 54 64 34 59 49 49 60 1 29 39 24 34 64 54 59 161 180 290 338 242 290 618, 1 60 54 64 450 59 49 60
LZ2523 8 system configuration example od os nc 1 ofd pw rs h2 h1 gnd v4 v3 v2 v1 nc 2 v 3b v 3a v 1b v 1a v ma v h v 4 v 2 v l v mb pofd nc v h v od v 4x v l (v pw ) v 3x v 2x v 1x vh 3ax vh 1ax +5 v ofdx h1 h2 rs ccd out 0.01 f 1 m$ v ofdh vh 3bx ofdx v 2x v 1x v 3x v dd gnd v 4x vh 3ax vh 1bx vh 1ax + + 1 2 3 4 5 6 7 8 12 24 23 22 21 20 19 18 17 13 11 14 10 15 9 16 1 2 3 4 5 6 7 14 13 12 11 10 9 8 lr36685 LZ2523 100 $ 270 pf 1 m$ 0.1 f (*1) (*1) + + (*1) rs , ofd : use the circuit parameter indicated in this circuit example, and do not connect to dc voltage directly.
packages for ccd and cmos devices 9 a ( : lid's size) 10.00 0.10 0.50 0.50 0.50 0.50 10.00 0.10 0.25 0.10 9.00 0.10 () 10.16 5.00 0.075 5.00 0.075 ccd 17 8 14 0.03 0.03 1.39 0.05 1.96 0.05 9.00 0.10 () package glass lid ccd rotation error of die : a= 1.0? max. center of effective imaging area and center of package cross section a-a' 3.50 0.30 1.27 0.25 2.55 0.10 0.30 typ. 0.46 typ. p-1.27 typ. 5.02 max. 3.35 0.10 a' a 0.80 0.05 () m 0.25 +0.5 e0 package (unit : mm) 14 wdip (wdip014-p-0400a)
precautions for ccd area sensors precautions for ccd area sensors 1. package breakage in order to prevent the package from being broken, observe the following instructions : 1) the ccd is a precise optical component and the package material is ceramic or plastic. therefore, ? take care not to drop the device when mounting, handling, or transporting. ? avoid giving a shock to the package. especially when leads are fixed to the socket or the circuit board, small shock could break the package more easily than when the package isn?t fixed. 2) when applying force for mounting the device or any other purposes, fix the leads between a joint and a stand-off, so that no stress will be given to the jointed part of the lead. in addition, when applying force, do it at a point below the stand-off part. (in the case of ceramic packages) the leads of the package are fixed with low melting point glass, so stress added to a lead could cause a crack in the low melting point glass in the jointed part of the lead. (in the case of plastic packages) e the leads of the package are fixed with package body (plastic), so stress added to a lead could cause a crack in the package body (plastic) in the jointed part of the lead. 3) when mounting the package on the housing, be sure that the package is not bent. e if a bent package is forced into place between a hard plate or the like, the pack- age may be broken. 4) if any damage or breakage occurs on the sur- face of the glass cap, its characteristics could deteriorate. therefore, ? do not hit the glass cap. ? do not give a shock large enough to cause distortion. ? do not scrub or scratch the glass surface. even a soft cloth or applicator, if dry, could cause dust to scratch the glass. 2. electrostatic damage as compared with general mos-lsi, ccd has lower esd. therefore, take the following anti-static measures when handling the ccd : 1) always discharge static electricity by grounding the human body and the instrument to be used. to ground the human body, provide resistance of about 1 m$ between the human body and the ground to be on the safe side. 2) when directly handling the device with the fingers, hold the part without leads and do not touch any lead. glass cap package lead fixed stand-off fixed lead stand-off low melting point glass 10 precautions for ccd area sensors
3) to avoid generating static electricity, a. do not scrub the glass surface with cloth or plastic. b. do not attach any tape or labels. c. do not clean the glass surface with dust- cleaning tape. 4) when storing or transporting the device, put it in a container of conductive material. 3. dust and contamination dust or contamination on the glass surface could deteriorate the output characteristics or cause a scar. in order to minimize dust or contamination on the glass surface, take the following precautions : 1) handle the ccd in a clean environment such as a cleaned booth. (the cleanliness level should be, if possible, class 1 000 at least.) 2) do not touch the glass surface with the fingers. if dust or contamination gets on the glass surface, the following cleaning method is recommended : ? dust from static electricity should be blown off with an ionized air blower. for anti- electrostatic measures, however, ground all the leads on the device before blowing off the dust. ? the contamination on the glass surface should be wiped off with a clean applicator soaked in isopropyl alcohol. wipe slowly and gently in one direction only. frequently replace the applicator and do not use the same applicator to clean more than one device. note : in most cases, dust and contamination are unavoidable, even before the device is first used. it is, therefore, recommended that the above procedures should be taken to wipe out dust and contamination before using the device. 4. other 1) soldering should be manually performed within 5 seconds at 350 ?c maximum at soldering iron. 2) avoid using or storing the ccd at high tem- perature or high humidity as it is a precise optical component. do not give a mechanical shock to the ccd. 3) do not expose the device to strong light. for the color device, long exposure to strong light will fade the color of the color filters. 11 precautions for ccd area sensors

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